Testing Bits

The Test-Under-Mask class of instructions provide an immediate mask field to test bits in storage or in a register.  To test a bit for B'1':

         TM    STORBYTE,X'80'           TEST BIT-0 OF A STORAGE BYTE
         TMH   R6,X'4000'               TEST BIT-1 OF R6
         TML   R6,X'0040'               TEST BIT-25 OF R6

For testing a register, using the TMH or TML instruction (to test the register’s high-order halfword or low-order halfword) is superior to the common technique of copying, shifting, and testing.

         TMH   R6,X'8000'               TEST BIT-0 OF R6
         BO    FOUNDIT                  BRANCH ON ALL ONES
*
         LR    R5,R6                    COPY R6 TO A TEST REG
         SRL   R5,31                    SHIFT OUT ALL BUT BIT-0
         LTR   R5,R5                    TEST FOR ANY 1-BITS
         BNZ   FOUNDIT                  BRANCH IF 1-BIT FOUND

The Test-Under-Mask instruction provides an efficient means of testing a switch.  The switch is tested for the value of a single bit rather than the value of the entire byte.

         MVI   SWITCH,X'00'             SET THE SWITCH OFF
         MVI   SWITCH,X'80'             SET THE SWITCH ON
         TM    SWITCH,X'80'             TEST FOR ON
         BO    SWON                     BRANCH TO ON ROUTINE
*
         MVI   SWITCH,C'N'              SET THE SWITCH OFF
         MVI   SWITCH,C'Y'              SET THE SWITCH ON
         CLI   SWITCH,C'Y'              TEST FOR ON
         BE    SWON                     BRANCH TO ON ROUTINE

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